(1) Field of the Invention
The present invention relates generally to electronics for converting power and amplifying signals and more particularly to a method and apparatus for providing power to an amplifier.
(2) Description of the Related Art
FIG. 1 is a schematic diagram illustrating an example of a half bridge class D amplifier. The half bridge class D amplifier comprises a positive supply voltage rail 101, a negative supply voltage rail 102, a ground 103, a positive supply voltage filter capacitor 104, a negative supply voltage filter capacitor 105, a high side driver 106, a low side driver 107, a low pass output filter inductor 108, a low pass output filter capacitor 109, and a load 110. A class D audio power amplifier in half bridge configuration presents several problems for the power supply. One example of such problems is off side charging.
Off-Side Charging
A half bridge configured class D amplifier will cause “off side charging,” or “rail pumping,” in which energy is transferred from the loaded converter output to the unloaded converter output. The loaded converter output is the portion of the power supply that supplies a first supply voltage to a first supply voltage rail from which the half bridge class D amplifier is currently drawing power. The unloaded converter output is the portion of the power supply that supplies a second supply voltage to a second supply voltage rail from which the half bridge class D amplifier is not intended to be currently drawing power. For example, when a high side driver 106 is active, power is provided from a power supply to a positive supply voltage rail 101 for the half bridge class D amplifier that comprises high side driver 106. During such time, a first portion of the power supply circuit that provides the positive supply voltage on the positive supply voltage rail 101 would be the loaded converter output, and a second portion of the power supply circuit that provides the negative supply voltage on the negative supply voltage rail 102 would be the unloaded converter output. As another example, when a low side driver 107 is active, power is provided from a power supply to a negative supply voltage rail 102 for the half bridge class D amplifier that comprises low side driver 107. During such time, the second portion of the power supply circuit that provides the negative supply voltage on the negative supply voltage rail 102 would be the loaded converter output, and the first portion of the power supply circuit that provides the positive supply voltage on the positive supply voltage rail 101 would be the unloaded converter output.
The off side charging, or rail pumping, condition occurs in half bridge class D amplifiers, as the load of a half bridge class D amplifier is coupled between the loaded converter output and ground and the filter capacitor of the unloaded converter output is coupled between its corresponding unloaded supply voltage rail and ground. Off side charging will cause the magnitude of the unloaded supply voltage of the unloaded rail to increase, which can easily make it exceed the voltage ratings of the class D amplifier devices, as well as causing distortion by introducing nonlinearity in the forward transfer function.
To minimize the impact of off side charging, large value capacitors are often used on the positive and negative power supply rails. However, the capacitance required is not proportional to the power output of the amplifier, but rather inversely proportional to the load impedance. This means that low power amplifiers driving low impedance loads require a large amount of capacitance disproportionate to their lower power output.
FIG. 2 is a waveform diagram illustrating an example of off side charging of power supply voltage rails resulting from operation of a half bridge class D amplifier. The duty cycle D is set at 75%, making D′ (i.e., not D, the opposite of D) 25%. This will theoretically result in an output voltage of Vrail/2 and an output current of Vrail/2R. This makes the off-side charging current equal to D′*Vrail/2R. For the purpose of this example, the inductor 108 can be considered to have a value large enough to ignore the ripple and treat it as a constant current source.
Waveform 201 depicts an example of a waveform of the voltage of an enable signal D to enable a high side driver 106 of an example of a half bridge class D amplifier. Waveform 201 goes high, to an enabling voltage 211, at time 206. Waveform 201 remains high, at enabling voltage 211, until time 207, when it goes low, to a disabling voltage 212. Waveform 201 remains at disabling voltage 212 until it again goes high, to the enabling voltage 211, at time 208. Waveform 201 remains high, at enabling voltage 211, until time 209, when it again goes low, to disabling voltage 212. Waveform 201 remains low, at disabling voltage 212, until time 210, when it again goes high, to enabling voltage 211. As this example depicts a duty cycle of 75%, waveform 201 is high, at enabling voltage 211, 75% of the time and low, at disabling voltage 212, 25% of the time.
Waveform 202 depicts an example of a waveform of the voltage of an enable signal D′ to enable low side driver 107 of an example of a half bridge class D amplifier. Waveform 202 goes low, to a disabling voltage 214, at time 206. Waveform 202 remains low, at disabling voltage 214, until time 207, when it goes high, to an enabling voltage 213. Waveform 202 remains at enabling voltage 213 until it again goes low, to disabling voltage 214, at time 208. Waveform 202 remains low, at disabling voltage 214, until time 209, when it again goes high, to enabling voltage 213. Waveform 202 remains high, at enabling voltage 213, until time 210, when it again goes low, to disabling voltage 214. As this example depicts a duty cycle of 75% for D, waveform 202, for D′, is high, at enabling voltage 213, 25% of the time and low, at disabling voltage 214, 75% of the time.
Waveform 203 depicts an example of a waveform of a voltage at a junction 111 of a high side driver 106 and a low side driver 107. Waveform 203 goes high, to a positive supply voltage 216, at time 206. Waveform 203 remains high, at positive supply voltage 216, until time 207, when it goes low, to a negative supply voltage 217. Waveform 203 remains at negative supply voltage 217 until it again goes high, to the positive supply voltage 216, at time 208. Waveform 203 remains high, at positive supply voltage 216, until time 209, when it again goes low, to negative supply voltage 217. Waveform 203 remains low, at negative supply voltage 217, until time 210, when it again goes high, to positive supply voltage 216. As this example depicts a duty cycle of 75%, waveform 203 is high, at positive supply voltage 216, 75% of the time and low, at negative supply voltage 217, 25% of the time. Inductor 108 and capacitor 109 act as a low pass filter to filter out the high frequency switching between the positive supply voltage 216 and the negative supply voltage 217, resulting in a steady voltage 218 that lies 75% of the way from the negative supply voltage 217 to the positive supply voltage 216 (i.e., at approximately half of the positive supply voltage in the example where ground 103 has a ground voltage that is centered between positive supply voltage 216 and the negative supply voltage 217).
Waveform 204 depicts an example of a waveform of a charging current 112, which flows while the high side driver 106 is active. Waveform 204 goes to a negative current level 220 at time 206. Waveform 204 remains at the negative current level 220 until time 207, when it goes to a zero current level 219. Waveform 204 remains at zero current level 219 until it again goes to negative current level 220 at time 208. Waveform 204 remains at negative current level 220 until time 209, when it again goes to zero current level 219. Waveform 204 remains at zero current level 219 until time 210, when it again goes to negative current level 220. As this example depicts a duty cycle of 75%, waveform 204 is at negative current level 220 75% of the time and at zero current level 219 25% of the time.
Waveform 205 depicts an example of a waveform of a charging current 113, which flows while the low side driver 107 is active. Waveform 205 remains at a zero current level 221 from time 206 to time 207. Waveform 205 goes to a positive current level 222 at time 207. Waveform 205 remains at positive current level 222 until it again goes to zero current level 221 at time 208. Waveform 205 remains at zero current level 221 until time 209, when it again goes to positive current level 222. Waveform 205 remains at positive current level 222 until time 210, when it again goes to zero current level 221. As this example depicts a duty cycle of 75%, waveform 205 is at zero current level 221 75% of the time and at positive current level 222 25% of the time.
The worst case for off-side charging can be derived by setting the derivative to zero and solving for D. For example, where Vout=2*Vrail*D=Vrail, Iout=Vout/R, and Ichg=(1−D)*Iout (i.e., the off side charging current), Ichg=(1−D)*Iout=(1−D) Vout/R=(−2*Vrail*DA2+3*Vrail*D−Vrail)/R. The derivative is set to zero as follows: dIchg/dD=(−2*Vrail*(2*D)+3*Vrail)/R=0. Consistent with the example of setting the duty cycle D at 75%, the equation is solved for D=¾, as the worst case off side charging occurs with D=¾ and Vout=Vrail/2. Accordingly, solving Ichg for D=¾ is performed as follows: Ichg=(−2*Vrail*(¾)^2+3*Vrail*(¾)−Vrail)/R=Vrail/(8*R). For typical audio applications, the worst case for Ichg will be a squarewave at 20 Hz, where Vout=Vrail/2. Accordingly, Ichg=C*dV/dt. Therefore, Vrail/(8*R)=C*(Vrail/8)/50 mS, setting the desired change in V at Vrail/8 for a 12.5% change. Thus, C=1/(20*R). Consequently, for an eight ohm load, C=6250 uF. As noted above, the value of C is a function of the output impedance, not the output power, so the above calculation is valid for a given percentage of fluctuation of Vrail and a given output impedance, regardless of the value of Vrail and the output power. Actual capacitance may be less if only sinewaves are used, but the result remains the same that C is inversely proportional to R, not proportional to power. The above calculation shows that to keep charging to ⅛ (i.e., 12.5%) of the initial rail voltage during a 20 Hz squarewave of Vrail/2 peak, the capacitance needs to be 1/(20*R) farads, or 6250 uF for each rail at eight ohms. That would require 12,500 uF per rail at 4 ohms, or 25,000 uF per rail at 2 ohms. A total capacitance of 50,000 uF is very large and unrealistic for a low power design, as large value capacitors are typically expensive and of large physical size, which both run counter to the low cost and small size generally preferred in modern electronics.
FIG. 3 is a waveform diagram illustrating an example of power supply voltage rail fluctuation resulting from off side charging. The waveform diagram is an example of what might be obtained using an oscilloscope to view waveforms of an actual circuit illustrating the problem. Waveform 301 depicts an AC waveform at the output of a transformer secondary winding, before rectification. Waveform 302 depicts a DC power supply voltage rail with substantial ripple arising from off side charging. In this case, a 50% voltage rise is obtained with 1,000 uF per rail at 4 ohms with a 20 Hz sine wave (a square wave would be somewhat worse). To achieve 3% voltage rise would take 15,000 uF each rail.
Regulation
The difficulty of providing power to a half bridge class D amplifier is further complicated by the use of a regulated power supply, which are typically regulated based only the positive supply voltage rail. In that case, any increase in the magnitude of the negative supply voltage rail will not enter into the feedback loop. Therefore, no correction for such increase will occur. If the positive rail is loaded and the negative rail is off side charged, then the amplifier is subjected to a possible overvoltage and nonlinearity. If the negative rail is loaded, it can sag all the way to zero without the feedback loop taking corrective action. Such lack of corrective action causes the amplifier output voltage to fall. The falling output voltage of the amplifier causes lower power output and distortion of the signal being amplified, which adversely affects the power rating and the sound quality of the amplifier's output.
If, as an alternative, the sum of the positive and negative output supplies is used to feed back into the regulation circuit, then any increase in the “off side charging” rail will allow a corresponding decrease in the loaded rail, causing the amplifier output voltage to fall. The situation occurs if the loaded rail is positive or negative. Again, the falling output voltage causes lower power output and distortion of the signal being amplified.
Typical prior art involves large capacitors and unregulated supplies to mitigate these effects for a half bridge class D amplifier, but rail sag (i.e., ineffective load regulation) is still present, reducing output power, and line regulation is not achieved. Moreover, the large capacitors in the power supply circuits add to the expense and physical size of amplifiers that utilize them.
Other prior art makes use of the full bridge class D amplifier to avoid these problems. However, full bridge class D amplifiers have several drawbacks such a large DC offset present on the output terminals, an inability to operate two channels into one load in bridge mono mode, and they require twice as many output driver stages and output filters as half bridge class D amplifiers, which adds to the expense and physical size of full bridge class D amplifiers.
Thus, a solution is needed that avoids the disadvantages of prior art techniques.